A clear input has been provided which, when taken to a high level, forces all outputs to the low level;
These counters were design to be cascaded without the need for external circuitry. Both borrow and carry outputs are available to cascade both the up and down counting functions
The counters can then be easily cascaded by feeding the borrow and carry outputs to the count down and count up inputs respectively of the succeeding counter
Independent of the count and load inputs. The clear, count, and load inputs are buffered to lower the drive requirements of clock drivers, etc., required for long words
The borrow output produces a pulse equal in width to the count down input when an overflow condition exists
وصف
This is a CMOS 8-bit successive approximation A/D converter that uses a differential potentiometric ladder-similar to the 256R products. This converter is designed to allow operation with the NSC800 and INS8080A derivative control bus with TRI-STATE output latches directly driving the data bus. This A/D appears like memorylocations or I/O ports to the microprocessor and no interfacing logic is needed.
-11%
العلامات التجارية الكبرى 74LS138 3 إلى 8 وحدة فك التشفير/إزالة تعدد الإرسال، Dip 16، 21ns، 32 ميجاوات (عبوة من 10)
KWD 4
Xytronic 74HC125 العلامات التجارية الكبرى Tri State Quad Bus Buffer، حزمة من 20
KWD 4
زيترونيك 74LS273 شبشب أوكتال من النوع D فليب فلوب، عبوة من 10 قطع
KWD 5
Xytronic CD4007 العلامات التجارية الكبرى زوج تكميلي مزدوج بالإضافة إلى العاكس، حزمة من 10
KWD 5.500
